Output capacitor below datasheet minimum
U3 (AP2112K-3.3) needs at least 1 µF of ceramic capacitance on VOUT to stay stable. C2 is 0.1 µF.
Fix: change C2 to 1 µF X5R, close to VOUT.
Source: AP2112 datasheet, Application Information
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STM32 + USB-C + LDO + op-amp filter · 6 issues · 2 explanations
U3 (AP2112K-3.3) needs at least 1 µF of ceramic capacitance on VOUT to stay stable. C2 is 0.1 µF.
Fix: change C2 to 1 µF X5R, close to VOUT.
Source: AP2112 datasheet, Application Information
USB_DP and USB_DN run straight from the connector to U1. A discharge at the port lands directly on the MCU pins.
Fix: add a low-capacitance USB ESD array next to J1.
Source: STM32F103 datasheet, Absolute maximum ratings
As a USB-C sink, J1 needs a 5.1 kΩ pull-down (Rd) on CC1 and CC2. Without them, most USB-C chargers will not supply VBUS.
Fix: 5.1 kΩ to GND on each CC pin.
Source: USB Type-C specification, Sink Rd
The boot mode pin is floating. U1 may start in the system bootloader instead of your firmware.
Fix: pull BOOT0 to GND with 10 kΩ.
Source: STM32F103 reference manual, Boot configuration
SDA and SCL are open-drain. Neither U1 nor U5 provides pull-ups strong enough for the bus.
Fix: 4.7 kΩ pull-ups to +3V3 on SDA and SCL.
Source: BME280 datasheet, I²C interface
U7 (W25Q128JW) is rated for 1.7–1.95 V. It is powered from +3V3.
Fix: use the 3.3 V variant (W25Q128JV), or add a 1.8 V rail.
Source: W25Q128JW datasheet, Operating ranges
The sensor signal from J2 passes through R4, R5, C4 and C5, a 2nd-order low-pass filter with a cutoff near 1.1 kHz. Rf and Rg set a gain of 2. The output feeds U1 PA0 (ADC_IN).
In short: removes high-frequency noise and scales the sensor signal before the ADC samples it.
Source: Calculated from R4, R5 = 10 kΩ, C4 = 22 nF, C5 = 10 nF, Rf = Rg = 10 kΩ
VBUS (5 V) from J1 feeds U3, an AP2112K-3.3 LDO. EN is tied to VIN, so U3 is always on. Its 3.3 V output is the only supply rail on this board.
In short: every part on this sheet runs from U3.
Source: Net VBUS, +3V3
I reviewed this sample board: an STM32 with USB-C power, a 3.3 V LDO, an I²C sensor and SPI flash. I marked 6 issues and explained 2 circuit blocks. Ask me about any of them.
SUGGESTED
U3 is an AP2112K-3.3 LDO. Its datasheet calls for at least 1 µF of ceramic capacitance on VOUT to stay stable. C2 on the output is 0.1 µF, so the regulator can oscillate under load.
Change C2 to 1 µF (X5R, 0603 or larger) and place it close to the VOUT pin.
Place a USB ESD array (for example a USBLC6-2 class part) between J1 and U1, as close to J1 as possible. Route USB_DP and USB_DN through it, tie its VBUS pin to VBUS and its GND pin to a solid ground via.
Keep the D+/D− pair length-matched after the change.
U4A is a Sallen-Key low-pass filter with a gain of 2. R4, R5 (10 kΩ) with C4 (22 nF) and C5 (10 nF) put the cutoff near 1.1 kHz, and Rf = Rg = 10 kΩ doubles the signal.
In short: it cleans high-frequency noise from the J2 sensor signal and scales it before U1 samples it on PA0.
A USB-C source only turns on VBUS when it sees a 5.1 kΩ pull-down (Rd) on a CC pin. CC1 and CC2 on J1 are floating, so most chargers and USB-C ports will supply nothing.
Add a 5.1 kΩ resistor from each CC pin to GND.
For a short on-board bus at 100 or 400 kHz, 4.7 kΩ to +3V3 on each line is a safe start. At 400 kHz with several devices or long traces, go down to 2.2 kΩ.
Use one pair of pull-ups per bus, not one per device.
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